Can a Computer Engineering Student Be Expelled for Fabricating FPGA VHDL Simulation Logs?

A university will summarily expel a computer or electronic engineering undergraduate, cancel all digital systems design and hardware description laboratory credits, and report the student to the Council for the Regulation of Engineering in Nigeria (COREN) for professional debarment for fabricating Field Programmable Gate Array (FPGA) Very High Speed Integrated Circuit Hardware Description Language (VHDL) timing simulation waveforms, faking logic gate propagation delay measurements, or forging digital electronics laboratory instructor verification signatures without compiling and synthesizing physical hardware architectures. In engineering curricula accredited by COREN, digital systems engineering—including writing structural and behavioral VHDL code, synthesizing RTL schematics, assigning physical FPGA pin constraints, and verifying timing closure using logic analyzers—represents a core life-safety competency; fabricating digital simulation logs subverts hardware reliability standards, conceals race conditions and setup/hold timing violations, and violates professional engineering ethics.

Departmental laboratory coordinators and computer systems examiners utilize Electronic Design Automation (EDA) software compilation audit trails to detect fabricated hardware submissions.

1. The digital systems design course lecturer audits submitted practical portfolios and identifies mathematically idealized timing waveforms that ignore physical FPGA lookup table (LUT) routing delays.
2. The chief laboratory technologist checks the digital electronics workstation sign-in register and confirms that the student never signed out FPGA development boards (such as Xilinx Spartan or Altera Cyclone), JTAG download cables, or logic analyzers.
3. The technologist checks the EDA software (such as Vivado or Quartus Prime) compilation logs and confirms that no bitstream generation or hardware synthesis sessions were logged under the student’s assigned workstation profile.
4. The student is formally summoned before the Departmental Laboratory Ethics Committee to produce their raw VHDL source files (.vhd) and demonstrate live hardware programming and oscilloscope logic probe measurements.
5. Inability to explain state machine transition architectures or replicate timing constraints leads to a formal charge of scientific fabrication and academic fraud.
6. The Head of Department transmits an investigative dossier to the Faculty of Engineering Board and the University Central Student Disciplinary Committee (SDC).
7. The student appears before the disciplinary committee to defend their submissions under constitutional principles of fair hearing.
8. The University Senate considers the committee’s findings and ratifies an order of rustication or summary expulsion, notifying COREN to bar future professional licensure.

Acquiring hands-on competency in digital systems design is essential for computer engineers who will design microprocessors, cryptographic hardware modules, and mission-critical telecommunications routing equipment.

• Standardized digital electronics laboratory manual with approved FPGA testing protocols.
• Raw bench workbook recording logic state equations, pin assignment mappings, clock frequencies, and measured propagation delays.
• Digital design workstation sign-in register confirming equipment allocation and FPGA board usage.
• Archived original VHDL source code files and timing simulation testbench waveforms.

Students must record actual experimental measurements honestly, accounting for logic race hazards and glitch artifacts, rather than manufacturing idealized digital waveforms.

Under COREN professional regulations and university examination codes, fabricating digital hardware simulation data is classified as severe academic fraud, carrying mandatory rustication and permanent loss of practical laboratory credits.

Maintaining rigorous laboratory ethics ensures that computer engineering diplomates and graduates develop sound technical judgement required to design reliable, defect-free digital computing hardware.